**ASSALAMUALAIKUM**

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**EEM 241 Mechatronic Laboratory 1 Semester 1 2011/2012**

**Experiment H FPGA Design Project No. 4**

I. The inputs and outputs of the calculator need to be displayed on 7-segments.

II. The 4-bits adder consists of 4-bits magnitude bits.

III. The inputs of calculator range from 0 to 15, use 4 switches to insert the values into calculator

IV. The calculator must also have addition, subtraction, and reset buttons

V. The outputs of calculator range from 0 to 15.

VI. The calculator must be able perform continuous addition or subtraction

Hint:

You may use D-flip-flop to design the continuous addition or subtraction operation

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